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caution electro-static sensitive devices the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. bipolar analog + digital integrated circuit m m m m pb1005gs reference frequency 16.368 mhz, 2nd if frequency 4.092 mhz rf/if frequency down-converter + pll frequency synthesizer ic for gps receiver document no. p13860ej3v0ds00 (3rd edition) date published april 2000 n cp(k) printed in japan data sheet the mark shows major revised points. 1998, 2000 description the m pb1005gs is a silicon monolithic integrated circuit for gps receiver. this ic is designed as double conversion rf block integrated rf/if down-converter + pll frequency synthesizer on 1 chip. the m pb1005gs features shrink package, fixed prescaler and supply voltage. the 30-pin plastic ssop package is suitable for high density surface mounting. the fixed division internal prescaler is needless to input serial counter data. supply voltage is 3 v. thus, the m pb1005gs can make rf block fewer components and lower power consumption. this ic is manufactured using necs 20 ghz f t nesat tm iii silicon bipolar process. this process uses direct silicon nitride passivation film and gold electrodes. these materials can protect the chip surface from pollution and prevent corrosion/migration. thus, this ic realizes excellent performance, uniformity and reliability. features ? double conversion : f refin = 16.368 mhz, f 2ndifout = 4.092 mhz ? integrated rf block : rf/if frequency down-converter + pll frequency synthesizer ? high-density surface mountable : 30-pin plastic ssop (9.85 6.1 2.0 mm) ? needless to input counter data : fixed division internal prescaler ? vco side division : ? 200 ( ? 25, ? 8 serial prescaler) ? reference division : ? 2 ? supply voltage : v cc = 2.7 to 3.3 v ? low current consumption : i cc = 45.0 ma typ.@v cc = 3.0 v ? gain adjustable externally : gain control voltage pin (control voltage up vs. gain down) application ? consumer use gps receiver of reference frequency 16.368 mhz, 2nd if frequency 4.092 mhz ordering information part number package supplying form m pb1005gs-e1 30-pin plastic ssop (7.62 mm (300)) embossed tape 16 mm wide. pin 1 is in tape pull-out direction. qty 2.5 kpcs/reel. remark to order evaluation samples, please contact your local nec sales office. (part number for sample order: m pb1005gs)
data sheet p13860ej3v0ds00 2 m m m m pb1005gs pin connections and internal block diagram if-mix in gnd (if-mix) rf-mix out v cc (rf-mix) rf-mix in gnd (rf-mix) v cc (1stlo-osc) 1stlo-osc1 1stlo-osc2 gnd (1stlo-osc) v cc (phase detector) pd-v out 3 pd-v out 2 pd-v out 1 gnd (phase detector) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 v cc (if-mix) v gc (if-mix) if-mix out gnd (2ndif-amp) 2ndlf in 1 2ndlf in 2 2ndlfbypass v cc (2ndif-amp) 2ndif out ref out v cc (reference block) ref in gnd (divider block) lo out v cc (divider block) pd ? 2 ? 8 ? 25
data sheet p13860ej3v0ds00 3 m m m m pb1005gs product line-up (t a = +25 c, v cc = 3.0 v) type part number functions (frequency unit: mhz) v cc (v) i cc (ma) cg (db) t a ( c) package status m pc2756t 6-pin minimold m pc2756tb rf down-converter with osc. tr 2.7 to 3.3 614 6-pin super minimold general purpose wideband separate ic m pc2753gr if down-converter with gain control amplifier 2.7 to 3.3 6.5 60 to 79 - 40 to + 85 20-pin plastic ssop available m pb1003gs rf/if down-converter + pll synthesizer ref = 18.414 1stif = 28.644/2ndif = 1.023 2.7 to 3.3 37.5 72 to 92 - 20 to + 85 m pb1004gs 2.7 to 3.3 37.5 72 to 92 - 20 to + 85 discontinued clock frequency specific 1 chip ic m pb1005gs rf/if down-converter + pll synthesizer ref = 16.368 1stif = 61.380/2ndif = 4.092 2.7 to 3.3 45.0 72 to 92 - 40 to + 85 30-pin plastic ssop available remark typical performance. please refer to electrical characteristics in detail. to know the associated products, please refer to their latest data sheets. system application example gps receiver rf block diagram 1575.42 mhz from antenna lna 1540f 0 bpf m pc2749tb example: 1540f 0 rf-mix rf-mix out 60f 0 bpf if-mix in if-mix 40f 0 lpf v gc if-mix out 2ndlf in 1 2ndlf in 2 2ndlfbypass 2ndlf-amp 16f 0 4f 0 16f 0 4.092 mhz 16.368 mhz buff buff to demodulator to demodulator ref tcxo 16.368 mhz v cc 8f 0 lo out loop amp 1stlo-osc2 1stlo-osc1 osc 1600f 0 1/25 1/8 p d 8f 0 1/2 f 0 = 1.023 mhz in the diagram. pb1005gs is in . m 64f 0 caution this diagram schematically shows only the m m m m pb1005gss internal functions on the system. this diagram does not present the actual application circuits.
data sheet p13860ej3v0ds00 4 m m m m pb1005gs absolute maximum ratings parameter symbol conditions ratings unit supply voltage v cc t a = +25 c3.6v total circuit current i cc t a = +25 c 128 ma power dissipation p d mounted on double-sided copper clad 50 50 1.6 mm epoxy glass pwb at t a = +85 c 464 mw operating ambient temperature t a - 40 to +85 c storage temperature t stg - 55 to +150 c recommended operating range parameter symbol min. typ. max. unit supply voltage v cc 2.7 3.0 3.3 v operating ambient temperature t a - 40 +25 +85 c rf input frequency f rfin ? 1575.42 ? mhz 1stlo oscillating frequency f 1stloin 1616.80 1636.80 1656.80 mhz 1stif input frequency f 1stifin ? 61.380 ? mhz 2ndlo input frequency f 2ndloin ? 65.472 ? mhz 2ndif input/output frequency f 2ndifin f 2ndifout ? 4.092 ? mhz reference input/output frequency f refin f refout ? 16.368 ? mhz
data sheet p13860ej3v0ds00 5 m m m m pb1005gs electrical characteristics (unless otherwise specified, t a = +25 c, v cc = 3.0 v) parameter symbol conditions min. typ. max. unit total circuit current i cc total i cc 1 + i cc 2 + i cc 3 + i cc 4 32.0 45.0 60.0 ma rf down-converter block (f rfin = 1575.42 mhz, f 1stloin = 1636.80 mhz, p loin = - 10 dbm, z l = z s = 50 w ) circuit current 1 i cc 1 no signals 6.0 10.0 14.0 ma rf conversion gain cg rf p rfin = - 40 dbm 12.5 15.5 18.5 db rf-ssb noise figure nf rf p rfin = - 40 dbm 7 10 13 db maximum if output power p o(sat)rf p rfin = - 10 dbm - 5.5 - 2.5 +0.5 dbm if down-converter block (f 1stifin = 61.38 mhz, f 2ndloin = 65.472 mhz, z s = 50 w , z l = 2 k w ) circuit current 2 i cc 2 no signals 3.4 5.3 7.2 ma if voltage conversion gain cg (gv)if at maximum gain, p 1stifin = - 50 dbm 38 41 44 db if-ssb noise figure nf if at maximum gain, p 1stifin = - 50 dbm 8.5 11.5 14.5 db maximum 2nd if output power p o(sat)if at maximum gain, p 1stifin = - 20 dbm - 9.5 - 6.5 - 3.5 dbm gain control voltage v gc voltage at maximum gain of cg if ?? 1.0 v gain control range d gc p 1stifin = - 50 dbm 20 ?? db 2nd if amplifier (f 2ndif = 4.092 mhz, z s = 50 w , z l = 2 k w ) circuit current 3 i cc 3 no signals 1.55 2.40 3.25 ma voltage gain g v p 2ndifin = - 60 dbm 37 40 43 db maximum output power p o(sat) p 2ndifin = - 30 dbm - 14.5 - 11.5 - 8.5 dbm pll synthesizer block circuit current 4 i cc 4 pll all block operating 18.5 28.5 38.5 ma phase comparing frequency f pd pll loop 8.0 8.184 8.4 mhz reference input minimum level v refin z l = 10 k w //20 pf (impedance of measurement equipment) 200 ?? mv p-p loop filter output level (h) v lp(h) 2.8 ?? v loop filter output level (l) v lp(l) ?? 0.4 v reference output swing v refout z l = 10 k w //2 pf (impedance of measurement equipment) 1.0 ?? v p-p
data sheet p13860ej3v0ds00 6 m m m m pb1005gs standard characteristics (unless otherwise specified t a = +25 c, v cc = 3.0 v) parameter symbol conditions reference unit rf down-converter block (p 1stloin = - 10 dbm, z l = z s = 50 w ) lo leakage to if pin lo if f 1stloin = 1636.80 mhz - 30 dbm lo leakage to rf pin lo rf f 1stloin = 1636.80 mhz - 30 dbm input 3rd order intercept point iip 3 rf f rfin 1 = 1600 mhz, f rfin 2 = 1605 mhz f 1stloin = 1660 mhz - 13 dbm if down-converter block (1stlo oscillating, z s = 50 w , z l = 2 k w ) lo leakage to 2nd if pin lo 2ndif f 2ndloin = 65.472 mhz - 20 dbm lo leakage to 1st if pin lo 1stif f 2ndloin = 65.472 mhz - 40 dbm input 3rd order intercept point iip 3 if f 1stifin 1 = 61.38 mhz, f 1stifin 2 = 61.48 mhz f 2ndloin = 65.472 mhz - 34 dbm
data sheet p13860ej3v0ds00 7 m m m m pb1005gs pin explanation pin no. pin name applied voltage (v) pin voltage (v) function and application internal equivalent circuit 3rx-mix out ? 1.68 output pin of rf mixer. 1st if filter must be inserted between pin 1 & 3. 4v cc (rf-mix) 2.7 to 3.3 ? supply voltage pin of rf mixer block. this pin must be decoupled with capacitor (eg. 1 000 pf). 5rf-mix in ? 1.20 input pin of rf mixer. 1 575.42 mhz band pass filter can be inserted between pin 5 and external lna. 6 gnd (rf-mix) 0 ? ground pin rf mixer. 5 4 3 6 1stlo -osc 7v cc (1stlo-osc) 2.7 to 3.3 ? supply voltage pin of differential amplifier for 1st lo oscillator circuit. 81stlo-osc1 ? 1.88 91stlo-osc2 ? 1.88 pin 8 & 9 are each base pin of differential amplifier for 1st lo oscillator. these pins should be equipped with lc and varactor to oscillate on 1636.80 mhz as vco. 10 gnd (1stlo-osc) 0 ? ground pin of differential amplifier for 1st lo oscillator circuit. 7 8 9 10 rf-mix or prescaler input v cc 11 v cc (phase detector) 2.7 to 3.3 ? supply voltage pin of phase detector and active loop filter. 12 pd-v out 3 pull-up with resistor ? 13 pd-v out 2 ? output in accordance with phase difference 14 pd-v out 1 pull-up with resistor ? pins of active loop filter for tuning voltage output. the active transistors configured with darlington pair are built on chip. pin 14 should be pulled down with external resistor. pin 12 to 13 should be equipped with external rc in order to adjust dumping factor and cutoff frequency. this tuning voltage output must be connected to varactor diode of 1st lo-osc. 15 gnd (phase detector) 0 ? ground pin of phase detector + active loop filter. 11 15 13 12 14 pd
data sheet p13860ej3v0ds00 8 m m m m pb1005gs pin no. pin name applied voltage (v) pin voltage (v) function and application internal equivalent circuit 16 v cc (divider block) 2.7 to 3.3 ? supply voltage pin of prescalers. 17 lo out ? 2.08 monitor pin of comparison frequency at phase detector. 18 gnd (divider block) 0 ? ground pin of prescalers + loout amplifier 16 18 1st lo osc ? 25 ? 8 if mix pd pd ? 2 ref. 17 19 ref in ? 1.96 input pin of reference frequency. this pin should be equipped with external 16.368 mhz oscillator (e.g. tcxo). 20 v cc (reference block) 2.7 to 3.3 ? supply voltage pin of input/output amplifiers in reference block. 21 ref out ? 1.65 output pin of reference frequency. the frequency from pin 19 can be took out as 1 v p-p swing. 20 19 18 21 pd 22 2ndif out ? 1.56 output pin of 2nd if amplifier. this pin output 4.092 mhz clipped sinewave. this pin should be equipped with external inverter to adjust level to next stage on users system. 23 v cc (2ndif-amp) 2.7 to 3.3 ? supply voltage pin of 2nd if amplifier. 24 2ndif bypass ? 2.30 bypass pin of 2nd if amplifier input 1. this pin should be grounded through capacitor. 25 2ndif in 2 ? 2.35 pin of 2nd if amplifier input 2. this pin should be grounded through capacitor. 26 2ndif in 1 ? 2.35 pin of 2nd if amplifier input 1. 2nd if filter can be inserted between pin 26 & 28. 27 gnd (2ndif-amp) 0 ? ground pin of 2nd if amplifier. 22 23 24 26 25 27
data sheet p13860ej3v0ds00 9 m m m m pb1005gs pin no. pin name applied voltage (v) pin voltage (v) function and application internal equivalent circuit 28 if-mix out ? 1.15 output pin from if mixer. if mixer output signal goes through gain control amplifier before this emitter follower output port. 29 v gc (if-mix) 0 to 3.3 ? gain control voltage pin of if mixer output amplifier. this voltage performs forward control (v gc up ? gain down). 30 v cc (if-mix) 2.7 to 3.3 ? supply voltage pin of if mixer, gain control amplifier and emitter follower transistor. 1if-mix in ? 2.05 input pin of if mixer. 2 gnd (if-mix) 0 ? ground pin of if mixer. 28 30 1 2 29 2nd lo caution ground pattern on the board must be formed as wide as possible to minimize ground impedance.
data sheet p13860ej3v0ds00 10 m m m m pb1005gs typical characteristics (unless otherwise specified, t a = +25 c, v cc = 3.0 v) - - - - ic total - - - - 01 2 3 4 total circuit current vs. supply voltage supply voltage v cc (v) total circuit current i cctotal (ma) 80 70 60 50 40 30 20 10 0 t a = + 85 c t a = - 40 c t a = + 25 c no signals - - - - rf down-converter block - - - - 01234 circuit current vs. supply voltage supply voltage v cc (v) circuit current i cc (ma) - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 + 10 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 + 10 1st if output power vs. rf input power rf input power p rfin (dbm) 1st if output power vs. rf input power rf input power p rfin (dbm) 1st if output power p 1stifout (dbm) 1st if output power p 1stifout (dbm) 12 10 8 6 4 2 0 + 10 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 + 10 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 f rfin = 1.575420 ghz f 1stloin = 1.63680 ghz p 1stloin = - 10 dbm f 1stifout = 61.38 mhz v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v t a = + 25 c t a = + 85 c t a = - 40 c f rfin = 1.575420 ghz f 1stloin = 1.63680 ghz p 1stloin = - 10 dbm f 1stifout = 61.38 mhz no signals
data sheet p13860ej3v0ds00 11 m m m m pb1005gs - 50 - 40 - 30 - 20 - 10 0 + 10 1st if output power vs. 1st lo input power 1st lo input power p 1stloin (dbm) 1st if output power p 1stifout (dbm) 0.1 0.3 1.0 2.0 rf conversion gain vs. rf input frequency rf input frequency f rfin (ghz) rf conversion gain cg rf (db) 10 30 100 300 1 000 rf conversion gain vs. 1st if output frequency 1st if output frequency f 1stifout (mhz) rf conversion gain cg rf (db) - 10 - 15 - 20 - 25 - 30 - 35 - 40 30 25 20 15 10 5 0 30 25 20 15 10 5 0 f rfin = 1.57542 mhz p rfin = - 40 dbm f 1stloin = 1636.8 mhz f 1stifout = 61.38 mhz v cc = 3.0 v v cc = 3.3 v v cc = 2.7 v p rfin = - 40 dbm p 1stloin = - 10 dbm f 1stifout = 61.38 mhz f lo = f rfin + f 1stifout v cc = 3.3 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 2.7 v v cc = 3.0 v f rfin = 1.57542 ghz p rfin = - 40 dbm p 1stloin = - 10 dbm f loin = f rfin + f ifout upper local - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 + 10 3rd order intermodulaton distortion, 1st if output power of each tone vs. rf input power of each tone rf input power of each tone p rfin (each) (dbm) 3rd order intermodulation distortion im 3 (dbm) 1st if output power of each tone p 1stifout (each) (dbm) + 20 + 10 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 - 90 p 1stifout (each) im 3 f rfin1 = 1 600 mhz f rfin2 = 1 605 mhz f 1stloin = 1 660 mhz p 1stloin = - 10 dbm upper local - - - - if down-converter block - - - - circuit current vs. supply voltage supply voltage v cc (v) circuit current i cc (ma) 01234 12 10 8 6 4 2 0 no signals
data sheet p13860ej3v0ds00 12 m m m m pb1005gs - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 2nd if output power vs. 1st if input power 1st if input power p 1stifin (dbm) 2nd if output power vs. 1st if input power 1st if input power p 1stifin (dbm) 2nd if output power p 2ndifout (dbm) 2nd if output power p 2ndifout (dbm) 0 - 5 - 10 - 15 - 20 - 25 - 30 - 35 - 40 - 45 - 50 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 0 - 5 - 10 - 15 - 20 - 25 - 30 - 35 - 40 - 45 - 50 f 1stifin = 61.38 mhz f 2ndloin = 65.472 mhz p 2ndloin = - 10 dbm f 2ndfout = 4.092 mhz v gc = gnd v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v t a = + 85 c t a = - 40 c t a = + 25 c f 1stifin = 61.38 mhz f 2ndloin = 65.472 mhz p 2ndloin = - 10 dbm f 2ndfout = 4.092 mhz v gc = gnd 10 30 50 70 100 10 30 50 70 100 135710 135710 if conversion gain vs. 1st if input frequency 1st if input frequency f 1stifin (mhz) if conversion gain vs. 1st if input frequency 1st if input frequency f 1stifin (dbm) if conversion gain cg if (db) if conversion gain cg if (db) if conversion gain vs. 2nd if output frequency 2nd if output frequency f 2ndifout (mhz) if conversion gain vs. 2nd if output frequency 2nd if output frequency f 2ndifout (mhz) if conversion gain cg if (db) if conversion gain cg if (db) 50 45 40 35 30 25 20 50 45 40 35 30 25 20 50 45 40 35 30 25 20 50 45 40 35 30 25 20 v cc = 3.3 v v cc = 3.3 v v cc = 3.0 v v cc = 3.0 v v cc = 2.7 v v cc = 2.7 v t a = + 85 c t a = + 85 c t a = - 40 c t a = - 40 c t a = + 25 c t a = + 25 c p 1stifin = - 50 dbm p 2ndloin = - 10 dbm f 2ndifout = 4.092 mhz v gc = gnd f 1stifin = 61.38 mhz p 1stifin = - 50 dbm p 2ndloin = - 10 dbm f 2ndifout = f 1stifin - f 2ndloin v gc = gnd f 1stifin = 61.38 mhz p 1stifin = - 50 dbm p 2ndloin = - 10 dbm f 2ndifout = f 1stifin - f 2ndloin v gc = gnd p 1stifin = - 50 dbm p 2ndloin = - 10 dbm f 2ndifout = 4.092 mhz v gc = gnd
data sheet p13860ej3v0ds00 13 m m m m pb1005gs 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 if conversion gain vs. gain control voltage gain control voltage v gc (v) if conversion gain vs. gain control voltage gain control voltage v gc (v) if conversion gain cg if (db) if conversion gain cg if (db) 50 40 30 20 10 0 - 10 - 20 - 30 50 40 30 20 10 0 - 10 - 20 - 30 v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v t a = + 85 c t a = - 40 c t a = + 25 c f 1stifin = 61.38 mhz p 1stifin = - 50 dbm f 2ndloin = 65.472 mhz p 2ndloin = - 10 dbm f 2ndifout = 4.092 mhz f 1stifin = 61.38 mhz p 1stifin = - 50 dbm f 2ndloin = 65.472 mhz p 2ndloin = - 10 dbm f 2ndifout = 4.092 mhz - 80 - 70 - 60 - 50 - 40 - 30 - 20 3rd order intermodulation distortion, 2nd if output power of each tone vs. 2nd if input power of each tone 2nd if input power of each tone p 1stifin (each) (dbm) 3rd order intermodulation distortion im 3 (dbm) 2nd if output power of each tone p 2ndifout (each) (dbm) 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 - 90 - 100 p 2ndifout (each) im 3 f 1stifin1 = 61.38 mhz f 1stifin2 = 61.48 mhz f 2ndloin = 65.472 mhz p 2ndloin = - 10 dbm v gc = gnd - - - - if amplifier block - - - - circuit current vs. supply voltage supply voltage v cc (v) circuit current i cc (ma) no signals 4 3 2 1 0 01234
data sheet p13860ej3v0ds00 14 m m m m pb1005gs 0.1 1 10 100 0.1 1 10 100 voltage gain vs. input frequency input frequency f in (mhz) voltage gain vs. input frequency input frequency f in (mhz) voltage gain g v (db) voltage gain g v (db) 42 41 40 39 38 37 36 42 41 40 39 38 37 36 v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v p 2ndifin = - 60 dbm r l = 2 k w p 2ndifin = - 60 dbm r l = 2 k w t a = + 85 c t a = - 40 c t a = + 25 c - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 2nd if output power vs. 2nd if input power 2nd if input power p 2ndifin (dbm) 2nd if output power vs. 2nd if input power 2nd if input power p 2ndifin (dbm) 2nd if output power p 2ndifout (dbm) 2nd if output power p 2ndifout (dbm) + 10 0 - 10 - 20 - 30 - 40 - 50 + 10 0 - 10 - 20 - 30 - 40 - 50 - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v f 2ndifin = 4.092 mhz r l = 2 k w f 2ndifin = 4.092 mhz r l = 2 k w t a = + 85 c t a = - 40 c t a = + 25 c - - - - pll synthesizer block - - - - circuit current vs. supply voltage supply voltage v cc (v) circuit current i cc (ma) no signals 40 30 20 10 0 01234
data sheet p13860ej3v0ds00 15 m m m m pb1005gs - - - - reference block - - - - 1 10 100 1 10 100 reference output swing vs. reference input frequency reference output swing vs. reference input frequency reference output swing vs. reference input power reference output swing vs. reference input power reference input frequency f refin (mhz) reference input frequency f refin (mhz) reference output swing v refout (v p-p ) reference output swing v refout (v p-p ) 2.0 1.5 1.0 0.5 0 2.0 1.5 1.0 0.5 0 p refin = 1.0v p-p p refin = 1.0v p-p v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v t a = + 85 c t a = - 40 c t a = + 25 c - 50 - 40 - 30 - 20 - 10 0 + 10 - 50 - 40 - 30 - 20 - 10 0 + 10 reference input power p refin (dbm) reference input power p refin (dbm) reference output swing v refout (v p-p ) reference output swing v refout (v p-p ) 2.0 1.5 1.0 0.5 0 2.0 1.5 1.0 0.5 0 f refin = 16.368 mhz f refin = 16.368 mhz v cc = 3.3 v v cc = 3.0 v v cc = 2.7 v t a = + 85 c t a = - 40 c t a = + 25 c remark the graphs indicate nominal characteristics.
data sheet p13860ej3v0ds00 16 m m m m pb1005gs test circuit signal generator 50 w 50 w spectrum analyzer signal generator c1 1pin 1 c2 2 3 4 v cc c3 c4 5 6 15 14 13 12 11 10 9 8 7 v cc c8 c9 r4 r3 c10 r2 c7 c6 v-di c5 v cc pd ? 2 ? 8 ? 25 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 c23 v cc c22 c21 r6 c20 spectrum analyzer to get maximum gain, apply 1.0v max. 50 w signal generator c19 c18 c17 c11 v cc c12 c13 c14 v cc c15 r5 c16 spectrum analyzer v cc spectrum analyzer or oscilloscope 50 w signal generator spectrum analyzer or oscilloscope spectrum analyzer: measure frequency oscilloscope : measure output voltage swing 50 w r1 component list form symbol value c1 to c5, c8, c11 to c15, c17, c18, c22 1 000 pf c6, c7 24 pf (uj) c9 1 800 pf c10 33 nf c19 10 000 pf chip capacitor c23 1 m f c16, c20 0.1 m f ceramic capacitor c21 0.01 m f r1, r2 4.7 k w r3 6.2 k w r4 1.2 k w chip resistor r5, r6 1.95 k w varactor diode v - di hvu12 chip inductor l 2.7 nh
data sheet p13860ej3v0ds00 17 m m m m pb1005gs package dimensions note each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition. 30 pin plastic shrink sop (300 mil) (unit: mm) 30 6.1 0.2 0.10 m 0.3 0.1 0.65 0.10 detail of lead end 0.51 max. 8.1 0.2 0.5 0.2 1.0 0.2 16 9.85 0.26 115 3? +7? ?? 0.15 +0.10 ?.05 2.0 max. 1.7 0.1 0.125 0.075
data sheet p13860ej3v0ds00 18 m m m m pb1005gs note on correct use (1) observe precautions for handling because of electro-static sensitive devices. (2) form a ground pattern as wide as possible to minimize ground impedance (to prevent abnormal oscillation). (3) keep the track length of the ground pins as short as possible. (4) connect a bypass capacitor (example: 1 000 pf) to the v cc pin. (5) frequency signal input/output pins must be each coupled with capacitor for dc cut. recommended soldering conditions this product should be soldered under the following recommended conditions. for soldering methods and conditions other than those recommended below, contact your nec sales representative. soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 235c or below time: 30 seconds or less (at 210c) count: 3, exposure limit: none note ir35-00-3 vps package peak temperature: 215c or below time: 40 seconds or less (at 200c) count: 3, exposure limit: none note vp15-00-3 wave soldering soldering bath temperature: 260c or below time: 10 seconds or less count: 1, exposure limit: none note ws60-00-1 partial heating pin temperature: 300c time: 3 seconds or less (per side of device) exposure limit: none note C note after opening the dry pack, keep it in a place below 25c and 65% rh for the allowable storage period. caution do not use different soldering methods together (except for partial heating). for details of recommended soldering conditions for surface mounting, refer to information document semiconductor device mounting technology manual (c10535e).
data sheet p13860ej3v0ds00 19 m m m m pb1005gs [memo]
m m m m pb1005gs attention observe precautions for handling electrostatic sensitive devices nesat (nec silicon advanced technology) is a trademark of nec corporation. the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. nec corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. m7 98. 8

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